1. Field of the Invention
This invention relates to memory hold time and more particularly relates to adjusting memory hold time.
2. Description of the Related Art
Computers often use memory modules, referred to hereafter as memory, such as Double Data Rate (DDR) memory to store working programs and data. For example, a computer with 1 GB of memory may employ two 512 MB memories. The memories allow each computer to be configured with more or less memory.
The memories receive data and an address over one or more buses from a memory controller. The data and address are referred to herein as data. The memory controller also communicates a data strobe to the memories. The data strobe indicates that the data is valid and will be valid for specified hold time. As used herein, the hold time is a time interval after receipt of the data strobe for which the data must be valid. The data strobe directs the memories to receive and store the data. The memories store the data if the data is valid for the hold time.
Unfortunately, as computers use increasing numbers of memories, a slew rate of the data strobe may decrease. As used herein, the slew rate is a maximum rate of change for an electrical signal such as a data strobe. For example, if a second memory is added to a computer with a first memory, the slew rate of the data strobe for the first and second memories may be reduced. As a result, a memory may receive a valid data strobe later than intended, reducing the hold time.
If the hold time is reduced sufficiently, a minimum hold time for a memory may be violated. When the minimum hold time is violated, data that is to be stored in a memory may be invalid when the memory attempts to latch the data. As a result, the memory may not function correctly and erroneous data may be stored.